An Extensible Self-Arbitrating Architecture for Redundant Onboard Computers In Nanosatellites

This thesis explores the use of a novel N-modular cold redundancy architecture using Commercial-Off-the-Shelf onboard computers in Nanosatellites. The proposed architecture explores a software-based decentralization of the arbitration logic. This eliminates the need for an external supervising device to perform the arbitration amongst the onboard computers (OBC). Instead, the architecture is reliant only on a memory-less watchdog timer to reset the spacecraft power bus in case an OBC becomes unresponsive. Moreover, the architecture assesses the health of each redundant OBC and provides precedence to the critical capabilities of the OBC. Finally, the proposed redundancy architecture enables extensibility and is near platform agnostic, allowing reusability across missions that utilize different OBC platforms, without the need for major modifications in the arbitration mechanism. The arbitration mechanism of proposed architecture was successfully validated in the lab by emulating faults using Raspberry Pi Zero W modules in triple modular redundancy. An additional OBC was added to demonstrate extensibility of the proposed redundancy architecture.