Hardware Accelerated Basecalling for Mobile Nanopore DNA Sequencing

dc.contributor.advisorMagierowski, Sebastian
dc.contributor.advisorGhafar-Zadeh, Ebrahim
dc.contributor.authorBeyene, Abel
dc.date.accessioned2025-11-11T19:52:47Z
dc.date.available2025-11-11T19:52:47Z
dc.date.copyright2023-04-17
dc.date.issued2025-11-11
dc.date.updated2025-11-11T19:52:47Z
dc.degree.disciplineElectrical and Computer Engineering
dc.degree.levelMaster's
dc.degree.nameMASc - Master of Applied Science
dc.description.abstractNanopore Sequencing is characterized by its high-throughput and long reads which makes it amenable to sequencing genomes in real-time. The vast amounts of data generated, however, imposes serious requirements on any hardware tasked with performing the back-end data processing necessary to convert the electrical signal inputs to base-pair label outputs. The literature contains several examples of machine learning algorithms targeted at nanopore sequencing and demonstrated on server class CPUs and GPUs. Such hardware would be poorly suited to mobile environments however which have tight power and area constraints. To demonstrate the potential of custom accelerators for sequencing tasks, this work presents a complete RISC-V System-on-Chip (SoC) equipped with a bioinformatics hardware accelerator and taped out in Global Foundries 22nm process. It’s able to achieve a 13X speed-up when basecalling over the ARM cortex A53 while only consuming 20 mW power.
dc.identifier.urihttps://hdl.handle.net/10315/43209
dc.languageen
dc.rightsAuthor owns copyright, except where explicitly noted. Please contact the author directly with licensing requests.
dc.subjectElectrical engineering
dc.subject.keywordsDNA sequencing
dc.subject.keywordsSoC
dc.subject.keywordsSystem-on-Chip
dc.subject.keywordsMobile processing
dc.subject.keywordsApplication specific processor
dc.subject.keywordsHardware acceleration
dc.titleHardware Accelerated Basecalling for Mobile Nanopore DNA Sequencing
dc.typeElectronic Thesis or Dissertation

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